Acyclic Data Read/Write via PROFIBUS DP V1
Overview
For Acyclic DP V1 access, a mechanism based on slot/index and length-addressing is implemented in the LTMR controller.
Variables are accessed every 10 registers. You cannot access registers located between two sub-groups. If the access is not possible, no register is accessed and a detected error value (for example, "not all registers found") will be returned via DP V1.
Reading Acyclic Data (DS_Read)
With
DS_Read
function, the PROFIBUS DP primary can read data from the secondary. The following table illustrates
the contents of a DS_Read frame.
Byte |
Syntax |
---|---|
0 [Function Number] |
0x5E [ |
1 [Slot Number] |
Constant value = 1 |
2 [Index] |
Register address / 10 Common access to registers is every 10 registers. The index is always rounded down to an integer. |
3 [Length] |
Length of data blocks in bytes (Number of registers) x 2 Maximum number of registers = 20 (40 bytes) Any length between 2 and 40 bytes is possible. |
4 to (length + 3) |
Block of data bytes to be read. |
DS_Read Example
Example: Reading of Identification registers 50 to 62
Byte |
Value |
---|---|
0 [Function Number] |
0x5E [ |
1 [Slot Number] |
1 |
2 [Index] |
5 [50/10] |
3 [Length] |
26 [(50 to 62 = 13) x 2] |
4 to 29 |
Value of registers 50 to 62 |
Sending Acyclic Data (DS_Write)
With
DS_Write
function, the PROFIBUS
DP primary can send data to the secondary.
Before writing a block of data, it is recommended to read a block of data first, in order to protect data that is not impacted. The whole block will only be written if you have write permission, to be checked within each register table in the section Communication Variable Groups. Column 3 table headers indicate if the variables within each table are Read-only or Read/Write.
The following table illustrates the contents of a DS_Write frame.
Byte |
Syntax |
---|---|
0 [Function Number] |
0x5F [ |
1 [Slot Number] |
Constant value = 1 |
2 [Index] |
Register address / 10 Common access to registers is every 10 registers. The index is always rounded down to an integer. |
3 [Length] |
Length of data blocks in bytes (Number of registers) x 2 Maximum number of registers = 20 (40 bytes) Any length between 2 and 40 bytes is possible. |
4 to (length + 3) |
Block of data bytes to be written. |
DS_Write Example: Process Description
Example: Resetting a trip by setting bit 704.3 to 1
1. Read 700 to 704.
Byte |
Value |
---|---|
0 [Function Number] |
0x5E [ |
1 [Slot Number] |
1 |
2 [Index] |
70 [700/10] |
3 [Length] |
10 [(700 to 704 = 5) x 2] |
4 to 13 |
Current values of registers 700 to 704 |
2. Set bit 3 of register 704 to 1.
3. Write the registers 700 to 704.
Byte |
Value |
---|---|
0 [Function Number] |
0x5F [ |
1 [Slot Number] |
1 |
2 [Index] |
70 [700/10] |
3 [Length] |
10 [(700 to 704 = 5) x 2] |
4 to 13 |
New values of registers 700 to 704 |
Feedback in Case of Detected Error
If the access is not possible, no register is accessed and a detected error value will be returned via DP V1.
The first 4 bytes of the response on DP in the case of a detected error are as follows:
Byte |
Value |
Meaning |
---|---|---|
0 |
0xDE/ 0xDF |
for DS_Read / DS_Write |
1 |
0x80 |
indicating DP V1 |
2 |
0xB6 |
detected error class + detected error code 1 = access denied |
3 |
0xXX |
detected error code 2, LTMR specific (see following table) |
Below is Detected Error Code 2, LTMR Specific:
Detected Error Code 2 |
Meaning |
---|---|
01 |
Internal stack request full |
03 |
Register not managed or super user access rights needed |
06 |
Register defined but not written |
07 |
Not all registers found |
08 |
Registers not authorized to be written |
10 |
Written value outside the register range, word value too large (too high) |
11 |
Written value outside the register range, word value too small (too low) |
12 |
Written value outside the register range (MSB value too large) |
13 |
Written value outside the register range (MSB value too small) |
14 |
Written value outside the register range (LSB value too large) |
15 |
Written value outside the register range (LSB value too small) |
16 |
Written value not a valid value |
20 |
Module rejects, sends back a detected error frame |
255 |
Internal error detected |
The presentation of a detected error code and a detected error class to the user logic depends on the primary implementation (for example, the PLC).
The mechanism only accesses blocks of parameters starting at a dedicated parameter (MB address). This means that unused parameters (MB addresses) are also accessed. The data value read from these parameters is 0x00; but in case of writing, it is necessary to write the value 0x00 to these parameters. Otherwise, the complete write access will be rejected.
TeSys T Internal Registers
For more details about the TeSys T internal registers, refer to the Communication Variables tables.