Definition of LTMT Main Unit Variables
LTMT Main Unit Registers
LTMT main unit memory includes 9250 registers at addresses ranging from 0 to 9249 (from 0x0000 to 0x2421).
Each register is a 16-bit word and is either:
-
Read-only, with values that cannot be edited.
-
Read-write, with values that can be edited.
The register number is equal to the register address + 1.
The custom logic editor uses only register addresses.
Custom logic commands can be used to change the values of read-write registers of the LTMT main unit.
Accessing Registers
Using the custom logic editor, you can access all LTMT main unit registers defined in the TeSys Tera Communication Guides.
Custom Logic Registers
Registers at addresses from 1200 to 1205 (from 0x04B0 to 0x04B5) and register at address 1291 (0x050B) are used by the TeSys Tera DTM Library to access LTMT main unit registers.
These registers are also the custom logic registers accessible from the communication ports. These read-only registers are described in the following sections.
This table lists these registers:
|
Register address |
Definition |
Range (value) |
|---|---|---|
|
1201 (0x04B1) |
Custom logic version |
0–65,535 |
|
1202 (0x04B2) |
Custom logic memory space |
|
|
1203 (0x04B3) |
Custom logic memory used |
|
|
1204 (0x04B4) |
Custom logic temporary space |
|
|
1205 (0x04B5) |
Custom logic non-volatile space |
|
|
1291 (0x050B) |
Custom logic DO input information |
Register at Address 1201 (0x04B1)
Register at address 1201 (0x04B1) indicates the custom logic capability version. The version number identifies a specific group of logic commands supported by the LTMT main unit.
Register at Address 1202 (0x04B2)
Register at address 1202 (0x04B2) defines the logic memory space available. The number of non-volatile LTMT main unit logic memory words (16 bits) available to save logic commands.
Register at Address 1203 (0x04B3)
Register at address 1203 (0x04B3) defines the logic memory used. This is the number of non-volatile LTMT main unit logic memory words (16 bits) used by logic commands which are currently stored in the LTMT main unit.
Register at Address 1204 (0x04B4)
Register at address 1204 (0x04B4) defines the number of temporary registers provided by the LTMT main unit.
Register at Address 1205 (0x04B5)
Register at address 1205 (0x04B5) defines the number of non-volatile registers provided by the LTMT main unit.
Register at Address 1291 (0x050B)
Register at address 1291 (0x050B) is the custom logic DO input information register. It enables the customized program to configure I/O assignment.
This table describes each bit in this register:
|
Bit number |
Description |
|---|---|
|
0 |
Custom logic digital output 1 (DO1) input information |
|
1 |
Custom logic digital output 2 (DO2) input information |
|
2 |
Custom logic digital output 3 (DO3) input information |
|
3 |
Custom logic digital output 4 (DO4) input information |
|
4 |
Custom logic digital output 5 (DO5) input information |
|
5 |
Custom logic digital output 6 (DO6) input information |
|
6 |
Custom logic digital output 7 (DO7) input information |
|
7 |
Custom logic digital output 8 (DO8) input information |
|
8 |
Custom logic digital output 9 (DO9) input information |
|
9 |
Custom logic digital output 10 (DO10) input information |
|
10 |
Custom logic digital output 11 (DO11) input information |
|
11 |
Custom logic digital output 12 (DO12) input information |
|
12 |
Custom logic digital output 13 (DO13) input information |
|
13 |
Reserved |
|
14 |
Reserved |
|
15 |
Reserved |
Registers at Addresses from 1301 to 1399 (from 0x0515 to 0x0577)
Registers at addresses from 1301 to 1399 (from 0x0515 to 0x0577) are the general purpose registers for logic functions. They are used to exchange information between external sources (such as the PLC) and the custom logic applications.
These volatile registers are read or write and can be edited either by the custom logic functions or via the communication port.